The present invention relates to semiconductor devices, and more specifically to a MIS semiconductor device which can suppress threshold voltage variation caused by channel length variation and which is suited to low voltage operation.
In a MIS semiconductor device represented by a MOS transistor, as integration density is increased and small size fabrication technology is developed, gate length becomes short and specific problems called "short channel effect" are produced. One of such problems is that threshold voltage is lowered as channel length becomes short. Lowering of the threshold voltage attendant on the shortening of the channel length becomes large as the channel length becomes shorter, and also fluctuation of the threshold voltage of the transistor becomes large due to fluctuation of the dimension of the gate electrode produced during forming the gate electrode. In low voltage operation of a transistor, since threshold voltage significantly affects the circuit characteristics, the fluctuation of the threshold voltage becomes a serious problem to disturb the low voltage operation.
The short channel effect occurs because a depletion layer spreads within the channel region due to the electric field of drain and the source, and ratio of the channel region capable of being controlled by the gate electric field is decreased. If this phenomenon becomes large, the depletion layers of drain and source touch with each other, and a problem called punch through occurs where current flows even if the gate voltage is not applied.
In order to reduce these problems, a simple scaling law method has been used in which the substrate dopant concentration is raised and spread of the depletion layer from the source and drain is suppressed.
In this method, however, since the threshold voltage rises as the substrate dopant concentration rises, in order to hold the threshold voltage to a conventional value, the thickness of the gate insulation film must be thinned simultaneously.
If the thickness of the gate insulation film is thinned too much, the insulator break down voltage is lowered. Therefore, and therefore in a transistor in the submicron region, a point is reached where the gate insulation film cannot be thinned so much and the above-noted simple scaling law cannot be applied. Also, as the substrate dopant concentration of the channel region rises, a problem is produced that carrier mobility is lowered by scattering of carrier due to an increase in dopants.
Conventional example 1 to reduce fluctuation of the threshold voltage in a conventional MIS semiconductor device caused by the short channel effect is disclosed in Y. Okamura, et al, "A Novel Source-to-Drain Nonuniformly Doped Channel (NUDC) MOSFET for High Current Drivability and Threshold voltage Controllability" IEDM Tech. Digest, pp. 391-394, 1990.
The structure of the conventional example 1 is shown in FIG. 5. Doping concentration of a substrate surface region 12 in the channel edge is made higher than that of a substrate surface 1 at the channel center, and the substrate doping profile at the channel center a--a' and the channel edge b--b' becomes as shown in FIG. 7. In this structure, since the threshold voltage of the region 12 in a definite distance from both ends of the channel becomes higher than that of the center 1, the effective threshold voltage determined by an average of the whole channel region becomes high as the channel length becomes short. This property and the lowering of the threshold voltage due to the short channel effect are canceled out, thereby the threshold voltage can be held nearly constant even if the channel length becomes short. Also in this structure, since concentration of the region 12 bordering on the source and drain and regions 4 is high and the depletion layer width can be suppressed, it is also effective for the punch through.
The method of forming a high concentration region 12 of a MOS semiconductor device in the conventional example in FIG. 5 is shown in FIG. 11. The high concentration region 12 is formed in self alignment after a gate electrode 3 is formed, using the gate electrode 3 as a mask, wherein p-type impurity having the same doping type as that of a substrate 1 is subjected to oblique ion implantation. Ions implanted from the side surface of the gate electrode 3 attain to the surface of the substrate 1 and the surface concentration of a part in a definite distance from the channel edge becomes high.
Next, in simple scaling law, due to the substrate dopant concentration increasing in inverse proportion to dimension of the gate electrode, the impurity scattering is increased and the mobility is lowered. Conventional example 2 to deal with this problem is disclosed in JPA No. 32462/1986 or M. Aoki, et al., "0.1 .mu.m CMOS Devices Using Low-Impurity--channel Transistors (LICT)" IEDM Tech. Digest. pp. 939-941, 1990. Structure of the conventional example 2 is shown in FIG. 6. Impurity concentration of a surface region 5 of a substrate with a MOS inversion layer formed thereon is made low and scattering of carrier due to impurity is suppressed and high mobility is obtained, and a region 1 of high concentration is provided under the surface region 5 so as to suppress the punch through.
In the conventional example 1, lowering of the threshold voltage in the case of the channel length being short can be suppressed, but the mobility is lowered since high concentration region is provided on the substrate surface of the channel region. Particularly, when the channel length is short, almost the whole channel region becomes high concentration and it has no difference from a device with the substrate dopant concentration raised by conventional simple scaling, thereby the mobility is lowered significantly. If the mobility is lowered, drain current is decreased resulting in lowering of the circuit operation speed. Since the region of high concentration is formed by conventional oblique ion implantation, ions are implanted also to the surface of the substrate of the channel region and therefore the mobility is lowered too.
Also in the conventional example 2, although rise of the mobility of the carrier and suppression of the punch through are noticed, lowering of the threshold voltage due to the short channel effect is not considered well.